Advanced Semiconductor Plating –
Key Fundamentals

Semiconductor electroplating compared with an electrolytic cell

For today’s advanced semiconductor electrochemical deposition (ECD) processes, fabs need to be able to produce well-formed features on wafers that are not only void-free but also of perfect dimension. And they must be able to accomplish this reliably, repeatedly and within an acceptable total system cost and operating cost.

This paper explains the important fundamentals of semiconductor electroplating, beginning with a comparison to the basic electrolytic cell. The most advanced plating processes for semiconductor manufacturing are all based on the same principles as a standard, electrolytic cell, employing the same basic elements of power supply, electrolyte, cathode and anode.

Controlling the plating process

In plating systems, the anode and wafer are connected electrically, through hardware and wiring, to a power supply which is advanced in its control capability. Fundamentally, the deposition of high-quality films operates in an electron-deficient condition, which is critical for enabling accurate control of the reaction rate, and thus, the deposition rate. In a state-of-the-art plating tool, the power supply is able to provide extremely precise current control, which is essential for delivering the high level of plating uniformity that is required for today’s semiconductor devices.

The volume of metal plated to a wafer is directly proportional to the number of moles of electrons provided to the system. By precisely controlling the total current applied, the electroplating system is able to deposit a very precise volume of metal on the wafer.

The formation of electrical features is a primary purpose of semiconductor plating. And particularly in the case of features plated within a patterned mask, current density drives the rate of vertical growth of the plated material that forms a feature. The current density applied in a given system is readily converted to a thickness-per-time rate, most often in units of micrometers per minute.

In summary, electron supply drives the rate of reaction at the wafer, which drives the rate of metal deposition. And the total charge (amp-hour) controls the height of deposited metal for a defined plated area.

Detailing the specific steps of semiconductor electroplating

The last section of this paper describes, step-by-step, the process of dialing in a targeted electroplating height/thickness, from surface pretreatment to final plating. It provides specific equations that may be used for computations regarding plating area on the wafer, current setpoint, charge, plating time, calculation of plating efficiency, and more.

This document provides a combination of fundamental principles and practical instructions with the goal of enabling engineers and operators of semiconductor electroplating equipment to more clearly understand plating processes in order to more quickly and efficiently achieve higher quality ECD in their fabs.

Download PDF of the full paper